PCs (personal computers), workstations and servers can be connected to network through LANs (Local Area Networks). The initial form of Ethernet was 10Base-T, which still has main network technologies of LANs. However, 10Base-T Ethernet can no longer satisfy the needs of network transmission, due to the rising of a variety of network applications and increased data traffic, especially the rising of multimedia data with immense bandwidth requirements, such as voice, images and video. These requirements had thus propelled the generation of Fast Ethernet, i.e. 100 Base-T.
However, in the recent years, due to the expansion of the scale of the network and the wide spreads of network interconnections and network applications like VoD (Voice on Demand) and data centres, 10Base-T again failed to satisfy the increasing demands of the new network applications, thus Gigabit Ethernet (1000Base-T) is generated. Gigabit Ethernet provides a bandwidth of one gigabits per second at a lower cost in a simpler Ethernet architecture, and also smooth transitions from 10Base-T and 100Base-T Ethernet devices.
Irrespective of how network connections are implemented, Ethernet transceivers are now widely used in numerous types of electronic devices, such as PCs, desktop computers or apparatuses in network layout within companies. Since there are many types of devices employed, conflicts and limitations often occur in the I/O mode of an Ethernet circuit. For example, in the network layout of a company, the density of transceivers is usually high, thus electromagnetic interference (EMI) between these devices has become a major concern, in addition to maintaining bandwidth and signal quality by, minimizing crosstalks and other external noise sources.
On the contrary, at places where electronic devices are scattered, EMI becomes a secondary concern. Instead power consumption by the Ethernet transceivers of notebook computers becomes an important issue. For electronic devices in which battery life is limited, components therein have to operate at minimum possible power consumptions to perform satisfactorily.
When a differential signal transmitter (e.g. an Ethernet transmitter) is in a Class A mode, a change of a differential current defines a differential signal. Since a common-mode current component is always kept at constant, the EMI and distortion are reduced when transmitting a differential signal. However, as the common-mode current is constant, even if the differential mode signal is zero, the constant common-mode current forces the circuit to conduct a constant amount of current at any time. This means a current mode transmitter that outputs a constant common-mode current inevitably consumes a considerable amount of power.
In order to reduce constant currents and in turns reducing power consumption, differential signal system has to be operated under a Class B mode. In the Class B mode, the common-mode current varies between zero and a maximum. However, the varying common-mode current results in severe EMI and distortion, which is to be avoided in areas populated with a high density of electronic devices.
In order to solve the problems above, U.S. Pat. No. 6,185,263 has proposed a digital-to-analog converter (DAC) employing both Class A/Class B modes to control the EMI and power consumption. As shown in FIG. 1(A), a differential-signal transmitting end (transmitter) generates control signals (a, b, c, and d) via Class A/Class B selection logic circuitry to control a line driver array, wherein the line driver array is consisted of a plurality of line driver cells. Each line driver cell outputs a specific amount of current. The Class A/Class B selection logic circuitry generates the control signals to control each line driver cell for operating in a Class A mode or Class B mode. The number of disabled line driver cells is also controlled by the selection logic circuitry in order to conform to different voltage swings required by different transmission standards.
Although this invention solves the problems in the prior art, the Class A/Class B selection logic circuitry consists of a plurality of Class A/Class B control circuits, where each Class A/Class B control circuit comprises a Class A logic circuit and Class B logic circuit. Each logic circuits generates a set of control signals (a, b, c, and d) and one of the sets of the control signals is selected via a 2:1 multiplexer (MUX) to control a line driver cell to operate in the Class A or B mode. Since the Class A/Class B control circuit is configured with the Class A and B logic circuits to form a mixed Class A/Class B control circuit, this greatly restricts the flexibility in circuit modifications. Additionally, the Class A and Class B logic circuits are simultaneously in operation, thus it is more power consuming.
Moreover, each line driver cell of the differential-signal transmitting end outputs a particular amount of current. When the output voltage is large (e.g. 2.5 V output voltage for 10Base-T Ethernet), then the required output current is accordingly large. Thus, the transmitting end requires more line driver cells to form the line driver array in order to satisfy a output voltage swing required by a certain transmission standard (e.g. 10Base-T transmission standard). This increases the design cost and complexity.
In addition, differential signal transmitters are currently applied to network apparatus, and one of two pairs of transmission lines is selected via a line driver, so as to output signals to the network via the selected transmission line. U.S. Pat. No. 6,703,865 discloses a line driver that drives a first or second transmission line according to a control signal. The architecture of this line driver is shown in FIG. 1(B). A differential amplifier 10 of the line driver is connected to a first differential switch 12 and a second differential switch 14, which are controlled by a first control signal 120 and a second control signal 140, respectively. The outputs of the first and second differential switches 12 and 14 are connected to a first transmission line 17 and a second transmission line 18, respectively, via a media interface 16.
The differential amplifier 10 includes FETs (field effect transistors) 100, 102, and 104. FET 100 provides an bias current I for FETs 102 and 104. The gates of FETs 102 and 104 are controlled respectively by a first component 190 and a second component 192 of a differential input signal. The FETs 102 and 104 amplify the differential input signal according to the bias current I to generate a differential output signal (having components 200 and 202, which are provided to the first and second differential switches 12 and 14, respectively). Then one of the first and second differential switches 12 and 14 is turned ON by the first and second control signals 120 and 140, so that the differential output signal can be sent to a network via the conducting differential switch, the media interface 16 and one of the first and second transmission lines 17 and 18.
However, the bias current I has to go through the two-stages FETs in order to be outputted, thus resulting in a large amount of current I loss and deteriorates the signal quality, and also making it difficult to operate under low voltage supply.
Hence, there is a need for a data transmission device that can be applied to network apparatus having an automatic crossover function (MDI/MDIX) and provides lower power consumption, anti-interference and reliable signal transmission according to an operating status of the network apparatus.